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 HD74LS83A
4-bit Binary Full Adder (with Fast Carry)
REJ03D0420-0200 Rev.2.00 Feb.18.2005 This improved full adder performs the addition of two 4-bit binary numbers. The sum () outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. This adder features full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation.
Features
* Ordering Information
Part Name HD74LS83AP Package Type DILP-16 pin Package Code (Previous Code) PRDP0016AE-B (DP-16FV) Package Abbreviation P Taping Abbreviation (Quantity) --
Note: Please consult the sales office for the above package availability.
Pin Arrangement
A4 3 A3 B3 VCC 2 B2 A2
1 2 3 4 5 6 7 8 2 B2 A2 1 B1 A1 3 A3 B3 A4 B4 4 C4 C0
16 15 14 13 12 11 10 9
B4 4 C4 C0 GND B1 A1 1
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 7
HD74LS83A
Function Table
Input A1 A3 L H L H L H L H L H L H L H L L H H L L H H L L H H L L B1 B3 L L L L H H H H L L L L H H A2 A4 L L L L L L L L H H H H H H B2 B4 L H H L L H H L L H H L L H When C0 = L 1 3 L L L H H H H L H H H L L L 2 Output When C0 = H When C2 = L C2 1 2 4 C4 3 L H L L L L L H L H L L L L H H L H L L L L H H H H H L
L H H H H L L L H L L L L H
When C2 = H C2 4 C4 L L L L L H H H L H H H H H
L H H H H L H L H H H H H H L H H H H H H; high level, L; low level, X; irrelevant Note: Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs 1 and 2 and the value of the internal carry C2. The value at C2, A3, B3, A4, and B4 are than used to determine outputs 3, 4 and C4.
Rev.2.00, Feb.18.2005, page 2 of 7
HD74LS83A
Block Diagram
C4
B4 A4 4
B3 A3 3
B2 A2 2
B1 A1 C0 1
Absolute Maximum Ratings
Item Supply voltage Input voltage Power dissipation Storage temperature Symbol VCC VIN PT Tstg Ratings 7 7 400 -65 to +150 Unit V V mW C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Supply voltage Output current Operating temperature Symbol VCC IOH IOL Topr Min 4.75 -- -- -20 Typ 5.00 -- -- 25 Max 5.25 -400 8 75 Unit V A mA C
Rev.2.00, Feb.18.2005, page 3 of 7
HD74LS83A
Electrical Characteristics
(Ta = -20 to +75 C)
Item Input voltage Symbol VIH VIL VOH min. 2.0 -- 2.7 -- -- -- -- -- -- -- -- -20 -- Supply current ICC -- -- Input clamp voltage VIR Note: * VCC = 5 V, Ta = 25C -- typ.* -- -- -- -- -- -- -- -- -- -- -- -- 22 19 19 -- max. -- 0.8 -- 0.4 0.5 40 20 -0.8 -0.4 0.2 0.1 -100 39 34 34 -1.5 V mA Unit V V V Condition
Output voltage VOL except C0 C0 except C0 C0 except C0 C0 Short-circuit output current IIH IIL II IOS
V A mA mA mA
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = -400 A IOL = 4 mA VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V IOL = 8 mA VCC = 5.25 V, VI = 2.7 V VCC = 5.25 V, VI = 0.4 V VCC = 5.25 V, VI = 7 V VCC = 5.25 V All inputs = 0 V B input = 0.8 V, Other inputs 4.5 V All inputs = 4.5 V VCC = 4.75 V, IIN = -18 mA VCC = 5.25 V
Input current
Switching Characteristics
(VCC = 5 V, Ta = 25C)
Item Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Inputs CO Ai, Bi CO Ai, Bi Outputs 1 1 C4 C4 min. -- -- -- -- -- -- -- -- typ. 16 15 15 15 11 15 11 12 max. 24 24 24 24 17 22 17 17 Unit Condition
Propagation delay time
ns
CL = 15 pF, RL = 2 k
Rev.2.00, Feb.18.2005, page 4 of 7
HD74LS83A
Testing Method
Test Circuit
VCC 4.5V RL C4 A4 Input B4 Output 4 Output 3 Output 1 Output 1 Same as Load Circuit 1. Same as Load Circuit 1. Same as Load Circuit 1. Same as Load Circuit 1. A3 B3 A2 B2 A1 B2 C0 CL Output
Load circuit 1
P.G. Zout = 50
Notes:
1. CL includes probe and jig capacitance. 2. All diodes are 1S2074(H).
Waveform
tTLH 90% 1.3 V 10% tPLH tTHL 90% 1.3 V 10% tPHL 3V 0V
Input
See Testing Table
VOH In phase output tPHL 1.3 V tPLH VOH Out of phase output 1.3 V 1.3 V VOL 1.3 V VOL
Note:
Input pulse; tTLH 15 ns, tTHL 6 ns, PRR = 1 MHz, duty cycle = 50%
Rev.2.00, Feb.18.2005, page 5 of 7
HD74LS83A Testing Table
Item From input to output CO i or C4 B4 GND GND GND GND GND tPLH tPHL GND IN GND GND GND 4.5 v IN A4 GND GND GND GND GND IN GND GND GND GND IN 4.5 v B3 GND GND GND GND GND IN GND GND GND 4.5 v IN GND A3 GND 4.5 v GND GND IN GND GND GND GND IN 4.5 v GND Input B2 GND GND GND GND IN GND GND GND 4.5 v IN GND GND A2 GND 4.5 v GND IN GND GND GND GND IN 4.5 v GND GND B1 GND GND GND IN GND GND GND 4.5 v IN GND GND GND A1 GND 4.5 v IN GND GND GND GND IN 4.5 v GND GND GND C0 IN IN GND GND GND GND GND GND GND GND C4 -- OUT -- -- -- -- -- -- -- OUT 4 -- OUT -- -- -- OUT -- -- OUT OUT Output 3 2 -- -- OUT OUT -- -- OUT -- -- OUT OUT -- -- OUT -- -- OUT OUT -- -- 1 OUT OUT OUT -- -- -- OUT -- -- --
Ai or Bi i or C4
Rev.2.00, Feb.18.2005, page 6 of 7
HD74LS83A
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
E
A1
A
Reference Symbol
Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 1.12 2.54 0.56 Max
e D E
L
1
A A1
e
bp
e1
b c b c
p 3
e Z ( Ni/Pd/Au plating ) L
Rev.2.00, Feb.18.2005, page 7 of 7
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .2.0


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